Electronic switching system



May 31, 1960 A. H. FAULKNER 2,933,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 13 Sheets-Sheet 1 DP-2 RG SUBSET"B" ALLOTTER LINE LINK COMMON EOUIF! SCANNER SUBSET "A" TO OTHER LINE CKT PULSE DISTRIBUTER JNVENTOR. ALFRED H. FAULKNER FIG. 1

ATTY.

1960 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6. 1958 232 LINE CIRCUIT IOI 7 l3 Sheets-Sheet 2 50V ZENER 0100s I w P -2ov I 254 WRRCJ INVENTOR. ALFRED H. FAULKNER ATTY.

May 31, 1960 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 l3 Sheets-Sheet 3 F 5 FIG. 6 FIG.

FIG. FIG. FIG. FIG.

2 3 4A 45 FIG FIG. FIG. FIG. FIG. FIG. FIG. iLI

2 3 7 s 9 IO M FIG. I4

iLq 7 IOV L c -20v T |ov CP-IE 307 GYM-3 BYM-I +|ov +IOV I s BYM-ZJ RCA- BYT- JNVENTOR.

ALFRED H. FAUL KNER ATTY.

y 1960 -A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 15 Sheets-Sheet 4 NEGATIVE IMPEDANCE REPEATER LINE FINDER FROM BYM OF LINKS 0F EQHEmKS 6-6 6-5 BYM-2 Fl 6. INVENTOR.

ALFRED H. FAULKNER ATTY.

May 31, 1960 A. H. FAULKNER 2,933,951

ELECTRONIC swncamc SYSTEM Original Filed Jan. 6, 195a 13 Sheets-Sheet 5 TRANSMISSION CONNECTOR SEQ. sw. EQUENCE sw,

HD DRIVER A I 2 3 4 5 BTST 0 L B T F1 6. 4 B JNVENTOR.

ALFRED H FAULKNER May 31, 19.60 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6; 1958 13 Sheets-Sheet 6 INVENTOR. ALFRED H. FAULKNER ATTY.

May 31, 1960 A. H. FAULKNER ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6. 1958 13 Sheets-Sheet 7 ALFRED H. FAULKNER AT TY.

y 31, 1960 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 l3 Sheets-Sheet 8 I0 932 947 DY 4 A 4 INVENTOR. [G 9 ALFRED H. FAULKNER ATTY.

May 31, 1960 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 13 Sheets-Sheet 9 G INVENTOR.

ALFRED H. FAULKtNER ATTY.

y 1960 A. H. FAULKNER 2,938,961

ELECTRONIC SWITCHING SYSTEM ATTY.

May 31, 1960 A. H. FAULKNER 2,933,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 13 Sheets-Sheet 11 DY2A DY2B q I DY2-INH 7 T DY2 -HOLD DY2C INVENTOR. F l G. 12 ALFRED H. FAULKNER ATTY.

May 31, 1960 DYS-INH DYSB DY5A

A. H. FAULKNER ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6, 1958 l3 Sheets-Sheet 12 2OV DECOUPLE INVENTOR.

ALFRED H. FAULKNER BY ATTY.

May 31, 1960 A- H. FAULKNER 2,933,961

ELECTRONIC SWITCHING SYSTEM Original Filed Jan. 6. 1958 15 Sheets-Sheet 13 FIG. INVENTOR.

ALFRED H. FAULKIER United States Patent O 2,938,961 I ELECTRONIC SWITCHING SYSTEM Alfred H. Faulkner, Redondo Beach, ,Calif., assignor to General Telephone Laboratories, Incorporated, Northlake, 111., a corporation of Delaware Original application Jan. 6, 1958, Ser. No. 707,298. Di- ;i9deg33nd this application Feb. 20, 1959, Ser. No.

3 Claims. (Cl. 179 -18) The invention relates in general to electronic switchthat tone signalling is used in lieu of the usual ringer.

. The principal object of the invention is to provide an improved circuit arrangement for controlling the supervision and signalling of the calling and called lines.

This object is achieved by providing an arrangement including a sequence switch driver for stepping a sequence switch to different output positions, the output signals from the sequence switch being used to control individual signal gate circuits through which diifercnt tone signals are coupled for transmisison to the calling line. The sequence switch driver has three inputs. Initiation of a call by a calling line causes a pulse to be transmitted over one of the driver inputs to step the sequence switch to a position in which the output signal opens a signal gate for coupling dial tone to the transmission circuit, and thence to the calling line. At the termination of dialling, the sequence switch is advanced to a position in which the output signal, in conjunction with a busy condition marking circuit, opens a signal gate for coupling busy tone over the transmission circuit to the calling line if the called line is busy.

If the called line is idle, the sequence switch is again advanced to couple ring-back tone to the calling line through a third signal gate.

Answering by the called station causes the sequence switch to be driven to the next position to close the ringback tone signal gate; and termination of the call causes the sequence switch to be driven to its normal position.

Other objects and features of this invention will be understood from an examination of the following description, taken in conjunction with the, accompanying drawings comprising Figs. 1 to 14 wherein:

Fig. 1 is a block trunking diagram of the electronic switching system shown herein by way of example, only two of the line circuits being shown;

Fig. 2 is a schematic diagram of the two line circuits;

Fig.3 is a schematic diagram of the line-link common equipment;

Figs. 4A and 4B.comprise a functional block diagram of one of the links;

Fig. 5 shows how Figs. 2, 3, 4A and 48 should be arranged together;

Fig. v6 shows how to arrange Figs. 2 and 3 together with Figs. 7 to 14 to obtain a detailed schematic diagram 2,933,961 Patented May3l, 1960 This system employs a time division multiplex arrangement having a time slot per line. Each time slot provides two-way transmission between its line circuit and a link. In each link, the line finder and the connector each includes a delay line with an arrangement for coupling the delay-line output and input to circulate pulses. These pulses are used in conjunction with distributor pulses to control the mutliplex transmission, and are also used for various other functions. During a connection, the circulating delay lines of the line finder and the connector deliver output pulses respectively in the time slots of the calling and the called lines.

In operation, one of the idle links is allotted for the next call. Scanning pulses are transmitted through the line finder delay line 'of the allotted link to the linecircuits. Detection of a calling condition on a line causes the delay line of the finder to circulate pulses in the time slot of the calling line, and the corresponding delay line of the connector to circulate pulses in time slot zero.

Conventional dial impulses are transmitted from the calling station to its line circuit, and from there over a multiplex control connection to the link. Each dial impulse causes the circulating pulses in the connector delay line to be advanced one time slot, from zero to one, and then to succeeding time positions; so that at the end of the dialled digit these circulating pulses are in the time slot of the called line.

The busy test, switch through, ringing, and answer then occur in succession. Release of both lines at the termination of a call causes further circulation of pulses in the delay lines of both the finder and connector to be inhibited.

B. GENERAL IDENTIFICATION OF THE SYSTEM Fig. 1 shows the entire system except that only two line circuits have been illustrated. The present embodiment of the system is a design for 10 lines although 'it could be expanded to a greater number within the scope of the invention.

The two line circuits 101 and 102 shown in Fig. 1 are associated with subsets A and B and connected thereto by lines 1 and 2.

All the line circuits of the system are connected in common to the line-link common equipment as shown, and also in common to lead RG of the ring and tone generator.' Each line circuit has a connection individual to itself and connected to the pulse distributor. Thus leads DP-l to DP-l) are the leads over which each line circuit is assigned its particular time slot in the time division multiplex system.

Lead :L is the common highway of the system over which intelligence of the system, comprising voice and tone signals, is transmitted. Lead l.2 v. is used for clamping and, for convenience, the diodes associated therewith are placed in the line-link common equipment. Lead C and lead S are control leads over which a link is seized and dialling occurs. Leads RC and RRC are control leads over which ringing is controlled.

The line-link common equipment 103 performs various functions such as amplifying pulses transmitted between the link and line circuits of the system and also clamps the common highway between pulse periods to prevent cross talk.

Lead RGP is associated with the ring and tone generator and is instrumental in subscriber ringing. Lead BYT and leads BYM-L BYM-Z, BYM-3, which are respectively associated with the three link circuits, are utilized to prevent the calling line from seizing more than one link. Lead CP1E is utilized to produce sharper pulses on leads C, RC, S, and BYT, and lead CB I'B has a pulse impressed thereon which helps preventcres e talk.

There are three links shown in this system which :are identical, each comprising a line fin'der,-a.-.connector and a transmission circuit which controls voice transmission and also introduces dial tone, busy tone and ring'back tone into the transmission system overleads DLT,iBST, and RBT respectively.

A signal on lead BTST starts busy tone on the busy tone lead BST. Lead RMST starts the ringiug.gener-ator in the. ring and tone generator circuit. Leads .CP-A and (DP-1F shape and synchronize the pulsesin the time'slots which are admitted'to a link circuit. Leads AL- l to AL-3 and ON-l to ON-.3are from the allotterandde: terrnirre which link will be assigned to the next calling subscriber.

The allotter circuit itself is a ring-of three counting, chain arranged to allot a call to an idle link. I v

The pulse distributor circuit feedspulses to the line circuits in their assigned time slot over the leads DP-1 to DP-O. Also, lead DP-O is connected to the links for dialling purposes,

The clock circuitis essentially an oscillator which produces variously spaced, pulseswhich control timing and pulse generating circuits.

The scannerzintroduces; a 1.5 microsecond pulse every 22 microseconds; over lead DYQB. into the links whereby.

the-links scan the line circuits andtest fora calling line.

The ring; and tone generator circuit produces dial tone over head DLT, busy tone over lead BST, and ring-back tone overl ad RBT. Leads RG and RGP are utilized to provide. ringing tothe line circuits.

One of the links is shown in functional block diagram form in Figs. 4A and 4B. The logic gates 6-1 to G-25 may be of the type having a diode connected between each input lead and the common output lead, and having a resistor connected from the output lead to a source of DC potential; except that in someofthe and gates this resistor is connected in place of a diode between the "output lead and one ofthe input leads designated R the, DC. potential being applied from an external source. to this input. The andYgates have. ground potential; at. the output until all the. inputs-are negative, then theoutput is; negative, and the. for? gates.v

at lead LA and time division multiplex at lead LMin av time slotof control pulses. applied to terminal P. The

negative impedance. repeater amplifies signals in both directions betweenthe LA leads, and also couples signals.

from the leadTA to one of the transmission gates. Amplifiers.arerepresentedby a triangular form. The differentiating circuits .DF-l; and. DF-,-.2 are circuits inclndinga series condenser and a shunt resistor for converting a change of potential at .the input A .tona.

pulse at the output B.

Each of the fiip-flop circuitstFF4 toFF-S. hasup to.)

five eX'ternaLconnections, lead s S0, S1, 1, and..L1-. Normally a negative potential is presenton the .leadLl,

in which case a pulse on the 81 lead places .anegative.

potential on lead} andarernoves it. from lead 0,,.and.eon-

versely a pulse on the lead SO places negative potentia on lead 0 and removes itfrom lead 1. Ifa negative-pm tential does not appear on lead L1, then the flip-flop cannot be set to have a negative potential on lead 1.

If a pulse of over 20 microseconds duration is placed upon either lead S1 or S0 whenthe other is at constant potential, the flip-flop will reset'itself. That is, a pulse of over 20. microseconds'in duration on lead S1 will cause anegative potential to be placed on lead l at the beginning of the pulseand'groun'd to be. placed onlead 1 at the end of the pulse. However, a-diiferentiating circuit placed in the S1 lead will prevent the flip-flop from resetting itself regardless of the pulse *duration. Sincethe flip-flop circuit is symmetrical, a similar ac- .tion will occur with a pulse of over 20 microseconds duration on lead S0. I

Summarizing for the flip flops, a pulse of less than 20 microseconds in duration on lead S0 causes negative potential 'tobe placed on lead 0, and ground on lead 1- and a pulse of less than 20 microseconds on lead S1 causes a negative potential to be placed on lead 1 and groundon lead 0. This'assumes a negative potential on lead L1 which is the normal condition, but if the negative potential does not appear on lead L1, then negative potential cannot appear on lead 1. If a pulse of over approximately 20 microseconds appears on lead or S1 thenthe flip-flop will reset itself at the end of the pulse.

The circuits DY-Z and DY-5 are'magnetostriction 'delay lines. .They comprise a nickel tube with a transmitting .coil and-a receiving coil wound thereon. A blocking oscillator circuit feeds an electrical impulse to the transmitting coil responsive to an input pulse at terminal A, and an electrical circuit'associated with the receiving coilshapes. and formsthe pulse and transmits it to the output terminal D. The pulses are synchronized. by cloclepulses applied to the lead CP-4. Delay -is-' ob tained by the. time required for-a mechanical pulse totravel in the nickel tube from the transmitting coil to the. receiving coil. Thus, a pulse at input A results in a regenerated pulse. at output B delayed a given time.

Thesemagnetostriction delay lines are also provided with; auxiliary features. A negative potential onthe inhi'bltf leadsI-NH blocks output at B. In delay line DY2',v a negative. potential is produced on thehold lead'by a:

train of:puls,es recirculated inthe delayline. A-negativcpotential is.v placed on lead C during the time that thereis a pulseat input-A.

lCircuit..DY.4 .isa: wire. wound electrical" delay line having-a. shield extending theilength ofthe line. The terminals, A and. B are. the. opposite ends of the wir e;

and terminal G is connectedt'othe shield. This is a onemicroseconddelay line which isv open circuited at the terminal-5B. Therefore, a pulse isreflected to'provide-a.

total delay of 2 microseconds.

The sequence switch driver. performs the function of generating pulses for advancing. the sequence switch.-

Simultaneous l0 volt input signals on hold lead HD and resistance input tohold gate RHD causes -10 volt: pulses delayed an interval of T1 microseconds on terminal? B and sirnultaneously -5 volt pulseson leadsC-to'be generated. Similar delayed-pulses, delayed by intervals of'TZ and-.Timicroseconds are-generated when -10 -volt s is applied simultaneously to changeover leads-C0,and.

RCOorbusytest leads- BY andRBY. The time duration .T1. is greatcr than Tl whichiisgreater thanT};

The sequence switch circn it-has tive steady statecon;

d-itions, and his inits. home or normal position; when negative potential appears on lead N. Aninputpulse on lead A causes the negative potential condition toadvance,

5 f'etnains there as long as the circuitis not in its home or normal position.

For schematic diagrams and a detailed description of all of the circuits of the system, reference may be made to the parent application. C. OVERALL OPERATION OF THE SYSTEM C1. Seizure of a callingline The operation of the system will be described with reference to Figs. 2, 3, 4A, and 4B, which should be arranged as shown in Fig. 5. The common equipment, including the pulse distributor, clock, scanner, ring and tone generator, and allotter, are not shown, but leads which are associated with any of these circuits are so marked.

Functional symbols are employed to describe the operation of the link circuit while the details of the line circuits and line-link common equipment are shown.

' Let us assume that the allotter has assigned link 2 to to be seized by the next calling party. A potential of -l volts then appears on lead AL-2. The scanner places a negative output pulse on lead DY6B every .22 microseconds. Flip-flop FF-l (Fig. 4A) is in its flop position which means that the() lead of FF-l will have -10 volts thereon, it being assumed that the normal position is the flop position. Therefore, it can be seen in Fig. 4A at gates G-2 and G-24 that a pulse will be gated through to lead A of delay line DY-Z every 22 microseconds. This pulse is of the same shape and phase as the pulse on lead DY6B.

This pulse is fed into delay line DY-Z and emerges 2O microseconds later at lead B of delay line DY-2. This pulse is ,fed through'gate 6-3 to lead S, therefrom into the line-link common equipment and into the base of transistor 308 which 'is an impedance matcher, and from there the pulse travels to all the line circuits over lead S but with no effect at this time. As can be seen, one line circuit is scanned every 22 microseconds, or in other words, a pulse appears in a new time slot every 22 microseconds. Therefore each line circuit is simultaneously pulsed by the pulse-distributor and the scanner only once every 220 microseconds or 4550 per second.

. The pulse distributor sends a pulse to each line circuit in its time slot every 20 microseconds. The remainder of the pulses on leads DP-Z to DP-0 are the same but only 2 microseconds apart.

Even when a pulse appears on lead S at the same time that a pulse appears on a DP-N lead, for instance lead DP-l, there will be no effect on the system until the.

calling party initiates the call. Let us assume that the calling party is at subset A which is connected to line circuit 101 by line 1. When the calling party initiates a call, a circuit is completed from ground through resistor 202, a winding on transformer 201, the calling partys line loop, diode 203, inductor 204, and a second winding on transformer 201 to ---20 volts. The loop resistance is compensated in the calling partys subset A and all other subsets to provide a line circuit of 30 milliamperes. Thus there is a 10 volt drop across resistor 202 which appears across diode 205, biasing it in the reverse direction. Point 209 remains near ground, however, due to the shunt paths through diode 207 and 208 to ground on leads DP-l and S respectively. Actually there is approximately +1.5 volts on lead DP-1.

When the calling party has initiated .the call by closing the subscriber loop circuit and a pulse appears simultaneously on leads S and DP-1, then point 209 swings to volts and transmits a pulse over lead C to the preselected link, which is link 2 in this example. The pulse is sent through an emitter follower amplifier associated with transistor 301 in the line-link common equipment, where impedance matching occurs. From there the pulse is transmitted to inhibit gate 164 of link 2.

Since the allotter has preselected link 2, '10 volts appears on lead AL-Z, which is gated through gate G-l to gate IG-1. The gate IG-l therefore opens when the" first pulse arrives on lead C and that pulse is fed to amplifier A-1, and from there to flip-flop FF-l, lead 3-1. This flips flip-flop FF-l which removes -10 volts from lead 0 and places --10 volts on lead 1 causing gate G4 to close. Gate G-4 now'opens as a negative voltage is placedon lead ON-Z, as will be seen later, and on lead 1 of flip-flop FF-l, and also because of the pulse on lead DY2B which is the scanning pulse just described.

Therefore the pulse on DYZB is fed back to the input lead DYZA through gates G-4, 6-24 and a pulse in time slot 1 corresponding to the calling party will circulate in the delay line DY-Z.

The recirculation pulses are also sent to gate G-S which is now opened by these pulses because 10 volts appears on lead 1 of flip-flop FF-l. From gate G-5 the pulses are sent to the calling party transmission gate TG-l. These pulses are also sent through gate G6 and amplifier A-2 to the busy mark amplifier associated with transistor 307. The pulses which emerge from the busy mark amplifier are fed back to the links over lead BYT to gate 6-17 of each link where they are used in testing for a busy called party as will be seen later.

The recirculating pulses, which emerge from amplifier A-2, are also fed to the other links over lead BYM-2 to gate G-22 of the other links, where they are used to block the seizure of the other links by the same calling P Y- The recirculating pulses are also sent through gate G-3 to lead S and from lead S todiode 208 where these pulses arrive simultaneously with the pulses on lead DP-1. Thus, the line circuit associated with line 1, or the calling party line, is connected to link 2, since the pulses on leads DP-l and S thereafter occur simultaneously at 20 microsecond intervals.

The first pulse on lead C which initiated the foregoing also was fed to flip-flop FF-Z lead S-l where it flipped flip-flop FF-2 thus causing l0 volts to be removed from lead 0 and placed on lead 1 of flip-flop FF-2. This causes a step voltage to be applied through gate G-9 to input 8-1 of flip-flop FF-3. Gate G-9 is opened by the step voltage from flip-flop FF-Z because there is a nega tive voltage on lead N at this time, thus enabling gate G-9 to pass a step voltage.

Flip-flop FF-3 therefore flips and a step voltage is generated at lead 1 of flip-flop FF-3 and applied to input C0 of the sequence switchdriver causing it to generate a pulse at each of its outputs, B and C, after a brief delay.

The pulse on lead C of the sequence switch driver flops? flip-flop FF-3, resetting it. The pulse on lead B of, the sequence switch driver is fed to the input A of the sequence switch, and causes the sequence switch to advance from its N or normal position to the UA position. This results in 10 volts being removed from lead N and being placed on lead ON-Z, which causes the allotter to advance, and remove 10 volts from lead AL-2. Gates G-4 and IG-l receive -10 volts through gate 6-1 from lead ON-2 in place of lead AL-Z.

When flip-flop FF-l flipped, it also opened gate 6-15 to permit pulses on lead DP-0 in the 0" time slot to pass through gates 6-15 and 6-16 to the input A of delay line DY-S, causing it to generate pulses at its output lead B, which are in the "0 time slot. These output pulses have no effect at this time. Following the brief delay introduced in the sequence switch driver, the sequence switch transferred -10 volts from lead N't o lead ON-Z, thereby closing gate 6-15 and opening gate 6-13 to complete a recirculating path from output lead B of delay line DY-S to the input A of delay line DY-'-5 through gates 6-13 and G-16. Therefore delay line'DY- 5 continues to generate pulses at output B in "time slot 0 independently of the pulse distributor lead DP-0.

. With the sequence switch in position UA, -10 volts is applied to the signal gate SG-l enabling the signal gate G-12 and amplifier A-6 to the negative impedance repeater and thence through thetransrmssion gate TG -l to the calling apartys line over the voice transmission common highwaylead :L. The link is now prepared to receive dial impulses.

7 C2. Dialling 'When the calling'party dials and the .calling'line'is openedby'the dial impulses, the point 209'is clamped" to .ground'through diode 20'5a'nd resistorZtlZ, thus interfrom lead'B of delay line DY.5 passes through gate 6-14 to delay line -DY4, which isa 2*microsecond delay line, since thepulse' travels "the length of delayli'n'e'DY-4 in one microsecond, is reflected at the open-circuited end and returns to the'input after a' total delay ot'2 microseconds. The reflected pulse'passes through amplifier A-4 and gate G-16 to the input A of delay line DY-S to trigger it in timeslotil. The pulse from'amplifier A-4 also flops flip-flop FP-4 which opens gate G-13 and closes'g'ate G-"14. Thexre'circulating' pulse in .delay line DY 5 now recirculates in time slot 1 instead'of time slot "'0."

Attheend of the first dial'impulse, the calling pa'rtys line is closed, and as. a. result, pulses in the calling partys time slot 1"again'appear on lead C. This occurs because point 209 is no longer clamped to ground through diode 205 and resistor 202. These pulses cause inhibit gate 16-2 to block pulsesfrom lead B ofdela'y line DY-2 and the first of these: pulses flips flip-flop FF-Z which in turn flips flip-flop FF3. Flip-flop FF-3 applies l volts to input C0 of the sequence switch driver but not long enough to cause the sequence switch driver to operate before the next impulse, if any, of the dialled digit is received.

At the start of the second impulse, the calling partys line 'is'opened, again" clamping point 209 to ground and interrupting the pulses on lead C. Flip-flop FF-Z is flbpped'again to cause'thepulse in .delay line DY-5 to advance to time slot 2 in the same manner as described for the first dial impulse. Thus the pulse which recircu'lates in delay line DY-5 is advanced one time slot for each dial impulse.

When flip-flop FF-2 flops at the start of a dial impulse it causes flip-flop FF-3 to flop also, thus preventing operation of the sequence switch driver during the series of impulses because the voltage present'at lead C0 of sequenceswitch driver isnot held there long enough to enable the sequence switch driver to generate a pulse at'B' 'to advance the sequence switch. Flip-flops FF-2 and 'FF-S, in turn, fiip at the end of each impulse, as describedpreviously.

C3. Busy test Assume that the called party corresponds to thedialled digit 2, and therefore that two dial impulses are re- -'ceived. After the last impulse of the dialled digit has been received, flip-flop FF3 remains flipped; therefore the sequence switch d'r-iver5generatesa pulse after a brief delay, and advances the sequence switch to its'busy test position -BT. Thenxposition UA has-ground thereon which blocks inhibit-gateIG-Zi, preventing further'oporation-of flip-flop FF-4; and; ground on positions UA and N blocks gate 6-9 which prevents further operation The-voltage on lead ET is applied to input .RBY of the squence switch driver thus preparing the :sequence.

switch'driver for busy test. The'voltage on lead BTal'so opens gate 6-17 to coincident; pulses from lead BYT and delay line DY-5. a pulse in the calledlines time slot will appear-on lead BYT coincidentwith the'pulse circulating in delay line DY-S. If this is'thecase then gate G-1'7 will open and a pulse willpass throughgates G-17 and 6-25 and flip fiip flopFF s. This places '1O volts on lead 1 and ground on lead 0 of flip-flop FF-S. The ground on lead 0 of'tlip fiop FF-S. is sent to the input'BY where it prevents "the sequence switch driver .from generating a;

pulse which would advance the sequence switch at this time.

The -10 volts on leadBT enablesgate G.18.to pass the step voltage on lead .1 of hip-hop F-F-S to themhib'it input'INH'to stop the circulating pulses in 'delay line .DY-.-5. At fthe'same time, the step voltage -from flip-'fiop FF 5, lead 1, opens supervisory gate 86-2 to transmit busy tone to the calling party through gate G-l2, amplifier A-6, the negative impedance repeater, and the transmission system to the calling party in the same manner as dial tone. Busy tone appears on lead BST because the 10 volts on lead ET is sent through diode 8 to lead BTST thereby causing the busy tone to'be-placed on lead BST. Release. from a busy condition'is similar to release from a completed call condition and is readily ascertained by reference tothesection entitled Release.

C4. Switch through If thecalled line is not busy there is no output-from gate 6-17 during the busy test interval. Therefore, 10 volts remains on lead 0 of flip-flop FF-S and isfed to input BY of the sequence switch d'n'ver and this ene' ables the sequence-switch driver to generate a pulse,

aftera brief delay, which advancesthe-sequence sWitcb toits switch-through position ST-Z. Thisaction. grounds lead BT to prevent further generation of pulses by the sequence switch driver and closes gates 6-17 and G-18.

The -10 volts on lead ST-Z permits the pulse sirculating in delay line DY-S to pass through gate'G Z't),

amplifier A-5, gate G-6, amplifier A-2 to leadBYM-l,- and back through the busy mark amplifier in the. line-t link common equipment to the busymark lead BYT,:to.

mark the called linebusy. The pulses from delayiline DY-5 emerging from-amplifier A=5 also flow through gate G-3 to lead S and to input P of transmission "gate time slot on lead RC are transmitted through the am-' plifier in the line-link common equipment associated with transistors 303 and 304 to point271 in the .line circuit.

102 associated with the called line, and to all other similar points in the remaining line circuits. The input pulse to the amplifier associated with lead RC is '5 volts, but the output pulse is an 8.5 volt pulse going from +1.5 volts when .the'pulse is'absent to -7 volts during the time the pulse. is on. The 10 volts on lead ST-2 coupled with "the 10 volts on lead 0 of flip-flop open 'gate G-23'-and through diode 834 place approximately l'0 volts on lead RMST. This starts the operation of the ringing generator which causes three ditferent' audio tones to be placed in sequence on lead RG. This sequence is repeated three times, followed by a'pause of about three seconds before the sequence is started again. Also, current flows over lead "RGP from the Ring and Tone Generatorduring the time that the sequence. of tones: appears on lead RG.

When the sequenceof tones. being fed "to' th'e line In the event thecalled line is busy,

circuit over lead RG, current flows over lead RGP to transistor 309 in the line-link common equipment and causes transistor 309 to saturate, which in turn causes transistor 310 to saturate, to place 20 volts on lead RRC. Therefore 20 volts is fed to all the line circuits over lead RRC. I

For the duration of the coincidence pulses on leads DP-2 and RC, 5 to -7 volts is applied from point 271 to point 272 of transformer 273 through diode 274. Lead RG, which is connected to terminal 275 of transformer 273, is alternately clamped to ground and raised to 10 volts at the ringing frequency rate. Assuming that lead RG is clamped to ground the current flow in winding 276 of transformer 273 increases linearly at a rate determined by the applied voltage and the inductance of winding 276 of transformer 27-3 reaching 3 to 4 milliamperes by the end of time slot 2.

The secondary winding 277 of transformer 273 is effectively open-circuited at this time since-the induced voltage biases diode 278 in the reverse direction be cause of the winding arrangement of transformer 273.

When the pulse on lead DP-2 expires it clamps point 271 to +1.5 volts through diode 281. The flux in transformer 273 now commences to decay, reversing the voltage induced in its secondary and causing a current to flow through diode 278 and the base-emitter path of transistor 280. The low forward resistance of this circuit beyond the characteristic knee limits the voltage across winding 277 of transformer 273 to between V2 and 1 volt. The flux therefore decays at only one-tenth the rate at which it rose during the input pulse.

The primary voltage is also limited by reason of the nature of the secondary load, hence diode 274 remains reverse-biased. Current flows in the secondary winding 277 of transformer 273 for practically the entire 18 microsecond interval between successive input pulses. I

Capacitor 279 smooths the waveform so as to provide a continuous drive to thexbase of transistor 280. The amplified current from the collector of transistor 280 flows over lead -L and a 50 volt Zener diode 281, in subset B to ground through the speaker transformer 282. This current varies in accordance with the ringing signal on lead RG thereby producing an audible signalat subset B.

The ring back tone is placed on lead RBT and since -;l volts is on lead ST-2, gate SG-3 opens and allows ring back tone to be sent into the transmission system in a similar manner as the dial tone and busy tone previously mentioned.

\ C6. Answer When the called party answers, the -10 volts developed across resistor 252 by closure of the line loop causes a pulse train to be transmitted over lead C as described above. These pulses arrive at gate G-19 coincident with those from delay line DY-S and pass through gates G-19 and (3-25 to flip flip-flop FF5. Ground on lead 0 of flip-flop FF- closes gate G-21 to block pulses in the called partys time slot from reaching lead RC which causes ringing to be interrupted because diofde 292 is not blocked any longer. Ground on lead 0 of flip-flop FF-S also blocks gate SG-3which interrupts ring back tone.

' C7. Transmission .The calling party and the called party are now in a condition permitting a bi-directional exchange of information. The calling party at subset A will transmit and receive intelligence to and from the transmis sion section of the link circuit in its particular assigned time slot and the called party at subset B will do likewise in its particular assigned time slot. The intelligence transmitted by the calling party must be stored in the transmission section of the link circuit until the called partys time slot occurs and vice versa.

The transmission gate TG-A in line circuit 101 cate prises diodes 214 and 216, a storage condenser 215, a

sistor 260, and bias circuits. The transmission gates" TG-1 and TG-2 in the link are similar, except that the transistors are NPN type, the diodes are poled in the opposite directions, and the biasing is difierent. Pulses 'in each case are applied to the base of the transistor to open the gate.

Referring particularly to the transmission of intelligence between the calling partys line circuit and the link transmission gates TG-A in the calling partys line circuit and TG-l in the link circuit are pulsed open simultaneously during the calling partys time slot. The intelligence transmitted to the link during the calling partys time slot is stored until transmission gates TG-B in the called partys line circuit and T64 in the link circuit are simultaneously opened during the called partys time slot, thus enabling the intelligence stored in the link to be sent to the called party, and this is repeated 50,000 times each second. The operation of the transmission circuit in the opposite direction of transmission is similar.

C8. Release Inthe event that the called party disconnects first,

circuit. Thus there is no elfect on the link circuit at this time. Whenthe calling party subsequently disconnects, the pulses on lead C in the calling time slot are also blocked. This causes flip-flop FF-Z to flop, because a pulse from delay line DY-Z on lead B is passed through inhibit gate IG-2 (because of the lack of coincidence of pulses in time slot 1 or the calling partys time slot) to input S0 of flip-flop FF-Z. There now appears a -10 volts on lead 0 of flip-flop FF-2. The +10 volts on lead 0 of flip-flop FF-Z, which is fed to input HD of the sequence switch driver, and the -10 volts on lead 1 of flip-flop FF-1 which is passed through gate 6-11 to input RHD of the sequence switch driver,- enable the sequence switch driver to generate two pulses which advances the sequence switch to its normal or N position. The 10 volt step voltage on lead N is applied to diiferentiating circuit DF-2, to produce a brief pulse on the inhibit input INH of delay line DY-2 to block the pulses circulating therein. The HOLD lead of delay line DY-2 then restores from -10 volts to ground. The removal of -10 volts from the HOLD lead of delay line DY-Z flops flip-flop FF-l and maintains it flopped and also maintains flip-flop FF-2 flopped. Flip-flops FF-1 and FF-2 are incapable of being operated until 10 volts appears at the HOLD lead of delay line DY-2 which occurs when pulses are sent through the delay line when the link is again selected for a call by the allotter. p The absence of -10 volts from lead 1 of flip-flop FF-l plus the absence of 10 volts from lead ON-Z of the sequence switch, blocks gate G-ll and thereby removes l0 volts from input RHD of the sequence switch driver, thus preventing the generation. of another pulse and thereby maintaining the sequence switch in its N or normal position.

With an absence of -10 volts on lead ON-2, gate 6-13 is blocked, thus blocking the recirculation of pulses in delay line DY-S and also flops flip-flop FF-S and maintains it so. All gates, which were opened during switch-through, are now closed.

In the event that the calling party disconnects first;

the pulses on lead C in the calling time slot are blocked 1 1 while those in the called time slot remain. In 'thezabsence of acoincident-pulse -on lead C, inhibitgate [G 2 passes pulses from-delay line DY-2, .lead B, to leadS of flip-flop FF-2 causing it to flop. But flip-flop 1FF-2 is-flipped by the next pulse on lead LCin thescallecl time slot, henceitoscillates at 50,000cycles per second having .10 volts onlead 'F at least ten percent oflithe time depending on the particular time slots involved .in the established connection. As long as flip-flop :EF-f-Z .continues tooscillate between its flip and fiop positions the sequence switch driver is not given time to generate a pulseand hence the link is.heldiby the.call-ed line. When the called party subsequently disconnects, fiip'sflop :EF-.-2 is no longer flipped by=pulsesonlead Oand the :release is eifected in'thesamemanner as-previously described.

Release fromabnsy condition is similar to what. has previously been described. When thezcalling partyc'disvconnects, flip-flop FF-2 flops. froma pulsefrom lead B of delay line DY-2 which is passed through inhibit gate 16-2 .to input S0of flip-flop FF.2. This places -10 volts-at input HD, which combined with the --10 volts placed on RHD, causes the sequencerswitch driver togenerate threepulses and-advance the'sequenee. switch toits N ornormal position in .amanner understoodby' reference to the previous parts of this section.

D. DETAILED DESCRIPTION The portion of the systemillustrated by the figures arranged as shown in Fig. 5 for explaining the overall operation, is illustrated with detailed schematic'drawings by the figures arranged as shown 'in Fig. 6.

D1. Subsets A and B The subsets which terminate the various lines of the system'are identical and Well-known in the art with the exception that tone signalling is used in lieu of the usual There isillustrated in Fig. 2 two subsets; subset which terminates line 1; and subset B which terminates line 2. The only parts of either subset which are'shown are the 50'volt Zener diodes 231 and 281, the loudspeaker audio transformers 232 and 282 and the loud-' D2. Line circuits As has been previously stated, the two line circuits 101 and 102 are utilized to terminate the lines 1 and 2. Thesetwo circuits as well as the line circuits terminating the other lines of the system, lines 3 to 0, are identical in circuitry and mode of operation. line circuits 101 and 102 are identical in every respect, the following description will be confined to line circuit 101 illustrated in detail in Fig. 2.

When the subscriber at subset A connected to line circuit 101 initiates a call a circuit is completed from ground through'resistor 202, a winding on transformer 201, the subscribers line loop, diode 203, inductor 204, and a second winding on transformer 201 to 20 volts. The loop resistance is compensated in the subscribers subset A and all other subsets to provide .a line current of 30 milliamperes. Thus-there is a volt drop across resistor 202 which appears across. diode 205 biasing it in the reverse direction. 7

Point 209 remains near ground,.however, due to shunt paths through diodes 207 and 203 to ground on leads DP-l and S, respectively. Actually there is 'approximately +1.5 volts on lead'DP-l from the pulse distributor circuit. The pulse distributor circuit cyclically removes the +1.5 VOliSlfOi' '2. microsecondsout of every 2.0 microseconds, defining time slot 1 allocated to line-1.

Since both 'Point 209 remaius near ground during time slot l=duetortheiground normally on lead S. As-has been previous-- ly Stated when alink is free to answer calls and issclected for use by t-he allotter it'sends out a continuous trainof pulses spaced at 22 microseconds intervals on.

lead S. When such a pulse appears on lead S in coincidence with a similar pulse on lead DP1, point 209 swings to --5 volts and transmits a pulse over lead C to the scanning link through the line link common equipment.

Upon receipt of such a pulse over lead C the linkv ceases its'scanning operation andthereafter sends a continuoustrainof pulses in time-slot '1 or lead S, these the loop' pulses being'returned over lead C as long as circuit to subset A remains closed.

The l0 volts appearing across resistor 202 is also applied to the base of transistor 210 of gate TG-A through resistor 234. The base of transistor 210 isnormally clamped to'lea'd DP'1 and hence approximately +1.5 volts. Thus transistor 210is cut off except during time slot 1 when the base voltage of transistor 210becomes 1.2 volts.- The base voltage of transistor 210 is clamped to 1.2 volts through diode 235 and twosilicon dio'cles. 324 and 325 inseries to ground (Fig. 3).

When'transistor 210'conducts, a current of 12 milli amperes'flows from the collector of transistor 210. 'A current of 2 milliamperes is normally flowingfrom 20' volts through diode 211, resistor 212,.and inductor 213 to -30'volts. With transistor 210 conducting, this 2' milliampere current is obtained from the collector of" transistor 210" since diode 211 will be reverse biased.

The'remaining 10 milliamperes flows through diode 21-4 and discharges capacitor 2l5-during the" first half off: the current pulse, then is switched through diode 216 to thecommon transmission line :L for the second'half of the pulse. During speech" transmission the current .is'

switched earlier or later than the midpoint.

The average voltageacross'capacitor 215 is 10 volts,

the discharge eifected by .transistor'210 in time slot -1 being partially made up for between pulses by the'base input circuit of transistor 218. The base-emitter path of transistor 218' is shunted by variable resistor 217.which is adjusted so as to provide a net current gain of 1 5 in the emitter follower circuit in which transistor 218 is connected. As a result of this current gain theIOOO ohm.

line impedance seen looking into transformer 20.1 is

changed to 15000 ohms looking into the base of transistor:

218 but without/any change in voltage level.

Dial tone is transmitted fromthe link circuit to the line loop over the common highway iL and through this transmission gate, which is explained in detail in the section titled Transmission, at this time to inform the subscriber that he may proceed todial.

During dialling excessive voltages would bea-pplicdzxto the transmission circuit due to the rapid decay as flux'- in transformer 201 upon interruption of the line circuit, if no measures were taken to prevent it. Diodes.219 and 220 limit the voltage applied to the emitter of transistor 1 218 to values betweenground and 20'volts as can be readily observed.

Each time that the line loop is opened by the impulse contacts of the dial, the .point 209 is cl'amped'tto ground through diode 205 and resistor 202, thus interruptingzthe train of pulses on lead C in time slot 1 for the duration of the dial impulse. Conduction of transistor 210 is also interrupted but this is inconsequential since'there is "no need for transmission at this time.

subscriber hangs up.

system.

.Dial tone, busy tone, ring-back tone, and speechtransmission are-all seut over the'transmission common hi'ghway :L-L and through'the transmission-gateTG- l.

answer Lead RG which is connected to terminal 225 of trans:

former 223 is alternately clamped to ground and raised to 10 volts at the ringing frequency rate. Assuming that lead R6 is clamped to ground, the current flow in winding 226 of transformer 223 increases linearly at a rate determined by the applied voltage and the inductance of winding 226 of transformer 223, reaching 3 to 4 milliamperes by the end of time slot 1.

The secondary winding 227 of transformer 223 is effectively open-circuited at this time since the induced voltage biases diode 228 in the reverse direction because of the winding arrangement of transformer 223.

When the pulse on lead DP-l expires it clamps point 221 to +1.5 volts through diode 237. The flux in transformer 223 now commences to decay, reversing the voltage induced in its secondary and hence causing current to flow through diode 228 and the base-emitter path of transistor 230. A

The low forward resistance of this circuit beyond the characteristic knee limits the voltage across winding 227 of transformer 223 to between A and 1 volt. The flux therefore deceiys at only one-tenth of the rate at which it rose during the input pulse.

The primary voltage is also limited by reason of the nature of the secondary load, hence diode 224 remains reverse biased. Current flows in the secondarywinding 227 of transformer 223 for practically the entire 18 microsecond interval between successive input pulses.

Capacitor 229 smooths the waveform so as to provide a continuous drive to the base of transistor 230. The amplified current from the collector of transistor 230 flows over lead -L and a 50 volt Zener diode 231 in subset A to ground through the speaker transformer 232. As can be seen this current varies in accordance with the ringing signal on lead RG producing an audible signal at subset A.

Now when the called subscriber answers, the 10 volts developed across resistor 202 by closure of the line loop permits a pulse train to appear on lead C, which causes the link circuit to interrupt the pulse train on.

lead RC, thus stopping the ringing.

D3. Line-link commo'n equipment The common equipment shown in Fig. 3 includes cirassociated with lead RGP and RRC for ringing, and a busy mark circuit associated with leads BYM-l, BYM-2, and BYM-3.

. The lead C has associated therewith an emitter follower amplifier including transistor 301. The amplifier is biased as a Class A emitter follower amplifier and its function is to match the high impedance of the line circuit to the low impedance of the link circuit. The pulse on lead CP-IE is also fed to the base of transistor 301 in order to obtain a fast response. Therefore by this circuit a --5 volt pulse on the input at the base of transistor 301 is translated into a -5 volt pulse at the emitter of transistor 301 but with the desired impedance match.

Turning to lead S therein is an amplifier associated with transistor 308 identical to that on lead C but the input is from the link and the output is to the line circuit. Therefore the high impedance of the link is matched with the low impedance of the line.

- The amplifier on the lead RC is a two stage amplifier comprising transistors 303 and 304. It amplifies the pulse amplitude. The input pulse is at -'5 volts but. the output pulse is an 8.5 volt pulse, going from +1.5

volts when the pulse is absent to 7 volts during the time the pulse is on.

The amplifier, including transistor 307, associated with. the busy mark leads BYM-l, BYM-Z, BYM-3, and BYT matches the links to each other. The function of the busy mark amplifier in the system has been previously explained in the general description of the system. The amplifier has three inputs any ofwhich will trigger the amplifier.

the three input leads. Therefore a negative pulse on either lead BYM-l, BYM-Z, or BYM-S, will cause a negative pulse on lead BYT. Since the transistor 307 is used in an emitter follower circuit and a -5 volt pulse is present on the input leads whenever there is a pulse at the input leads it can be seen that the output pulses on lead BYT are 5 volts in amplitude as: well.

The ringing gate control amplifier comprises transistors 309 and 310 and has input and output leads RGP and.

RRC respectively. 1

In order to cut down crosstalk caused by the common. highway lead :L, a transmission clamp circuit is provided. A pulse on lead CP-IB from the clock circuit is impressed on the primary winding of transformer 313 between transmission pulses. The circuit includes trad-- sistors 311 and 312; and diodes 317, 318, 320, and 321.

Point 319 is clamped to -10 volts during the time the.

pulse is on lead CP-lB whether the previous potential was positive or negative. Thus a fixed voltage is maintained on lead :L for the beginning of each new pulse thereby reducing crosstalk. I w,

D4. Link A functional diagram of a link circuit is shown in Figs. 4A and 4B and it is there shown that the link circuit is composed of three units, the line finder, the con-.1

nector, and the link transmission circuit.

The functional cooperation of the various sub-units of these three main units of the link in the overall system has been explained and it is the purpose here to describe the subunits individually. The detailed circuits are in. Figs. 7 to 14. p

D4a. Circuits of similar character Some of the circuits found in various parts of the link are of a similar character and are explained under common headings before the three parts of the link.

D4111 Magnetostriction delay lines DY-Z a n d DY-5 z A magnetostriction delay line DY-2 provided in the;

line finder of each link functions primarily as a calling line memory device. The schematic diagram is shown in Fig. 12.

The magnetostriction delay line DY-2 is composed of a blocking oscillator circuit which feeds an electrical impulse to a transmitting coil which is wound around The electrical pulse is transformed into a mechanical pulse at the transmitting coil and the mea nickel tube.

chanical pulse travels down the nickel tube to a receiving coil which transforms the mechanical pulse to an electrical pulse. An electrical circuit associated with the receiving coil shapes and forms the pulse.

This circuit not only delays any pulses delivered to the input thereof 20 microseconds before they reachthieoutput but has auxiliary features as well.

An inhibit lead DY-2-INH is provided which when the input to delay line DY-2 and a short time thereafter, Thus if the output pulse from delay line lDY-2 is There is also a clock pulse on the lead CP-i 1B which causes a faster response to a pulse on any of 

